The present invention relates to a semiconductor device and a method for manufacturing the same and, more particularly, to both an MOS and a bipolar devices having a first polycrystalline silicon (poly-Si) layer which contacts a semiconductor substrate through a contact hole and a second poly-Si layer which is formed on the first poly-Si layer to serve as a low resistivity wiring and a resistor element, and to a method for manufacturing the MOS devices.
To dope metal into a poly-Si layer which serves as low resistivity wiring is a well known method to achieve high speed electric operation of semiconductor devices.
In a semiconductor shown in FIG. 1, an alloy layer 4 consisting of a metal and silicon is formed on a poly-Si layer 3 which is electrically connected to a semiconductor substrate 2 through a contact hole 1. The alloy layer 4 is connected to Al wiring 6 through a contact hole 5. The poly-Si layer 3 contains a great amount of metal in the surface portion close to the alloy layer 4. However, the concentration of metal in the poly-Si layer 3 decreases with an increase in the depth thereof. The metal is not substantially contained in the bottom portion of the poly-Si layer 4.
Reference numeral 7 denotes a shallow diffusion region formed in the semiconductor substrate 2 by diffusing an impurity from the poly-Si layer 3 into the semiconductor substrate 2. Reference numeral 8 denotes a field oxide film; reference numeral 9 denotes an insulating film; and reference numeral 10 denotes a protective film such as a PSG. The metal should not be contained in the bottom portion of poly-Si layer 3, to avoid the diffusion through the buried contact hole 1 together with the impurity contained in the poly-Si layer 3 into the semiconductor substrate. This is because the metal diffusion from the poly-Si layer 3 causes alloy spike in the semiconductor substrate, which results in breaking the p-n junction of the shallow diffusion region 7 into an ohmic junction.
In order to prevent alloy spike, the alloy layer 4 must be about 50 to 100 .ANG. thick. Therefore low sheet-resistivity poly-Si layer, lower than about several ohms per sheet, is hard to obtain. Furthermore, the increase of the poly-Si layer does not serve to decrease the sheet resistivity much because the thickness of alloy layer 4 cannot be more than about 100 .ANG. in order to avoid the alloy spike damage. Therefore, the conventional metal-doping into a poly-Si layer is not a very effective method to obtain a low resistivity wiring layer. Accordingly, it is difficult to make a high-speed semiconductor device by the conventional metal-doping method.